PM4314中文資料PMC數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

FEATURES

? Integrates four duplex DSX-1 or CEPT E1 compatible line interface circuits in

a single monolithic device. Line format is selected on a per-device basis.

? Provides clock recovery and line performance monitoring in the receivers.

? Provides jitter attenuation and programmable line build out in the transmitters.

? Utilizes digital phase-locked loops for receive and transmit clock derivation

without the use of tuned circuits.

? Provides an integrated 8X clock multiplier for generation of required highspeed clocks in applications not requiring jitter attenuation.

? Optionally inserts Alarm Indication Signal (AIS) when loopback modes are

enabled. AIS insertion may also be directly controlled via the microprocessor

interface.

? Provides a generic microprocessor interface for initial configuration, ongoing

control, and status monitoring.

? Generates an interrupt upon detection of any of various alarms, events, or

changes in status. Identification of interrupt sources, masking of interrupt

sources, and acknowledgment of interrupts is provided via internal registers.

? Provides optional hardware programmed mode which provides external

configuration pins when microprocessor access is not available to the device.

? Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board

test purposes.

? Provides seamless interface to PM4344 TQUAD, PM6344 EQUAD, PM8313

D3MX, and PM7344 S/UNI-MPH.

? Low power CMOS technology, 1500 mW power dissipation processing all

ones signals on all four quadrants.

? 128-pin (14mm x 20mm) PQFP package.

APPLICATIONS

? T1 or E1 ATM interfaces

? Electronic DSX-1/CEPT E1 Cross-connects

? Digital Access and Cross-connect Systems (DACS)

? Multiplexers

? Channel Service Units (CSUs)

? DSX-1/CEPT E1 Repeaters

? Test Equipment