PM6541中文資料PMC數(shù)據(jù)手冊PDF規(guī)格書

OVERVIEW

The PM6541 E1XC EVBD evaluation daughterboard allows for the test, evaluation and demonstration of the PMC PM6341 E1XC device. It is also compatible with the PM4341 T1XC device. This daughterboard can be used standalone with up to two E1XC devices but has been especially designed to mate with the PMC PM1501 EVMB evaluation motherboard to form a complete evaluation system. All required decoding logic is provided on the E1XC EVBD daughterboard to give the EVMB direct access to all registers of both E1XC devices.

All of the principal connections to both devices have been brought out to header strips for convenient test access. E-1 digital interfaces are provided on a header strip and BNC or mini-bantam connectors are provided for E-1 analog signals. Both 75 ? and 120 ? interfaces are provided. The backplane interfaces of each device are accessible through header strips and the devices can be interconnected back to back, effectively creating a jitter-attenuating format converter by dropping in shorting connectors into specific DIP sockets.

Clocks for the backplane are provided by a T1/CEPT digital trunk DPLL which provides a synchronized 1.544 MHz, 2.048 MHz, or 4.096 MHz signal. The PLL can be easily bypassed to allow direct drive of the backplane with an appropriate oscillator. A prototype area has been provided for breadboarding more complex applications.

The E1XC EVBD evaluation daughterboard is configured, monitored, and powered through an edge connector that is designed to mate with the EVMB evaluation motherboard