AR8035-AL1A 無線收發(fā)芯片

原廠料號：AR8035-AL1A品牌：QUALCOMM/高通

Symbol Pin Type Deion

MDI

TRXP0, TRXN0 9, 10 IA, OA Media-dependent interface 0, 100 transmission line

TRXP1, TRXN1 12, 13 IA, OA Media-dependent interface 1, 100 transmission line

TRXP2, TRXN2 15, 16 IA, OA Media-dependent interface 2, 100 transmission line

TRXP3, TRXN3 18, 19 IA, OA Media-dependent interface 3, 100 transmission line

RGMII

GTX_CLK 33 I, PD RGMII transmit clock, 125 MHz digital. Adding a 22 damping

resistor is recommended for EMI design near MAC side.

RX_CLK 31 I/O, PD 125MHz digital, adding a 22 damping resistor is recommended

for EMI design near PHY side.

RX_DV 30 I/O, PD RGMII receive data valid

RXD0 29 I/O, PD RGMII received data 0

RXD1 28 I/O, PD RGMII received data 1

RXD2 26 I/O, PD RGMII received data 2

RXD3 25 I/O, PD RGMII received data 3

TX_EN 32 I, PD RGMII transmit enable

TXD0 34 I, PD RGMII transmit data 0

TXD1 35 I, PD RGMII transmit data 1

TXD2 36 I, PD RGMII transmit data 2

TXD3 37 I, PD RGMII transmit data 3

Management InterfaceInterrupt

MDC 40 I, PU Management data clock reference

MDIO 39 I/O, D, PU Management data, 1.5K pull-up to 3.3V/2.5V

INT 20 I/O, D, PD Interrupt Signal to System; default OD-gate, needs an external

10K pull-up, active low; can be configured to I/O by register,

active high.

LED

LED_ACT 21 I/O, PU Parallel LED output for 10/100/1000 BASE-T activity, active

blinking. LED active based upon power-on strapping. If pulled up

— active low, if pulled down — active high

LED_1000 22 I/O, PU Parallel LED output for 1000 BASE-T link, LED active based upon

power-on strapping. If pulled up — active low, if pulled down —

active high

• 芯片型號：

  AR8035-AL1A

• 規(guī)格書：

  下載

• 企業(yè)簡稱：

  QUALCOMM【高通】詳情

• 廠商全稱：

  QUALCOMM ATHEROS

• 中文名稱：

  美國高通公司

• 資料說明：

  RF & MICROWAVE PRODUCT SOLUTIONS 6.04 - Bulk