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Q67100-H5156中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書
Q67100-H5156規(guī)格書詳情
Functional Description
The CMOS circuit SDA 5649 is intended for use in video cassette recorders to retrieve control data of the PDC system from the data lines broadcast during the vertical blanking interval of a standard video signal.
Features
● Single-chip receiver for PDC data, broadcast either
– in Broadcast Data Service Packet (BDSP) 8/30/2 according to CCIR teletext system B, or
– in dedicated line no. 16 of the vertical blanking interval (VPS)
● Reception of Unified Date and Time (UDT), Network Identification code (NIC), and Short Program Label (SPL) broadcast in BDSP 8/30/1
● Reception of bytes no.38 through 45 of teletext header row containing clock time
● Low external components count
● On-chip data and sync slicer
● I2C-Bus interface for communication with external microcontroller
● Selection of PDC/VPS operating mode software controlled by I2C-Bus register
● Pin and software compatible to PDC/VPS Decoder SDA 5648
● Supply voltage: 5 V ± 10
● Video input signal level: 0.7 Vpp to 1.4 Vpp
● Technology: CMOS
● Package: P-DIP-14-3 and P-DSO-20-1
● Operating temperature range: 0 to 70 °C
產(chǎn)品屬性
- 型號：
Q67100-H5156
- 制造商：
INFINEON
- 制造商全稱：
Infineon Technologies AG
- 功能描述：
Expanded Decoder for Program Delivery Control and Video Program System EPDC/VPS Decoder
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
24+ |
5000 |
公司存貨 |
詢價 | ||||
LNFINE |
23+ |
PLCC |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
LNFINE |
23+ |
PLCC |
11200 |
原廠授權(quán)一級代理、全球訂貨優(yōu)勢渠道、可提供一站式BO |
詢價 | ||
SIEMENS/西門子 |
2020+ |
NA |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價 | ||
SIE |
23+ |
65480 |
詢價 | ||||
LNFINE |
23+ |
NA/ |
3460 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價 | ||
SIEMENS/西門子 |
2021+ |
NA |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價 | ||
INFINEON |
23+ |
8000 |
只做原裝現(xiàn)貨 |
詢價 | |||
INFINEON |
23+ |
NA |
19960 |
只做進(jìn)口原裝,終端工廠免費(fèi)送樣 |
詢價 | ||
LNFINE |
23+ |
PLCC |
89630 |
當(dāng)天發(fā)貨全新原裝現(xiàn)貨 |
詢價 |
