Q67100-Q2096中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書

The HYM 324025S/GS-50/-60 is a 16 MByte DRAM module organized as 4 194 304 words by 32-bit in a 72-pin single-in-line package comprising eight HYB 5117405BJ 4M x 4 DRAMs in 300 mil wide SOJ-packages mounted together with eight 0.2 μF ceramic decoupling capacitors on a PC board.

Each HYB 5117405BJ is described in the data sheet and is fully electrical tested and processed according to SIEMENS standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed.

The speed of the module can be detected by the use of four presence detect pins.

The common I/O feature on the HYM 324025S/GS-50/-60 dictates the use of early write cycles.

? 4 194 304 words by 32-bit organized SIMM modules for PC main memory applications

? Fast access and cycle time

50 ns access time

84 ns cycle time (-50 version)

60 ns access time

104 ns cycle time (-60 version)

? Hyper page mode (EDO) capability

20 ns cycle time (-50 version)

25 ns cycle time (-60 version)

? Single + 5 V (± 10 ) supply

? Low power dissipation

max. 5280 mW active (HYM 324025S/GS-50)

max. 4840 mW active (HYM 324025S/GS-60)

CMOS – 44 mW standby

TTL –88 mW standby

? CAS-before-RAS refresh

RAS-only-refresh

Hidden-refresh

? 8 decoupling capacitors mounted on substrate

? All inputs, outputs and clocks fully TTL compatible

? 72 pin Single in-Line Memory Module with 22.86 mm (900 mil) height

? Utilizes eight 4Mx4-DRAMs in 300mil wide SOJ packages

? 2048 refresh cycles / 32 ms

? Optimized for use in byte-write non-parity applications

? Tin-Lead contact pads (S - version)

? Gold contact pads (GS - version)