Q67100-Q985中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書

The HYM 368020S/GS-60 is a 32 MByte DRAM module organized as 8 388 608 words by 36-Bit in a 72-pin single-in-line package comprising sixteen HYB 5117400BJ 4M × 4 DRAMs and eight HYB 514100BJ 4M x 1 DRAMs in 300 mil wide SOJ-packages mounted together with 24 0.2 μF ceramic decoupling capacitors on a PC board.

? SIMM modules with 8 388 608 words by 36-bit organization for PC main memory applications

? Fast access and cycle time 60 ns access time 110 ns cycle time (-60 version)

? Fast page mode capability 40 ns cycle time (-60 version) Single + 5 V (± 10 ) supply

? Low power dissipation

max. 7260 mW active (-60 version)

max. 6600 mW active (-70 version)

CMOS – 132 mW standby

TTL –264 mW standby

? CAS-before-RAS refresh RAS-only-refresh Hidden-refresh

? 24 decoupling capacitors mounted on substrate

? All inputs, outputs and clocks fully TTL compatible

? 72 pin Single in-Line Memory Module (L-SIM-72-14) with 31.75 mm height

? Utilizes sixteen 4Mx4-DRAMs and eight 4M x 1 DRAMs in 300 mil wide SOJ packages

? 2048 refresh cycles / 32 ms

? Optimized for use in byte-write parity applications

? Tin-Lead contact pads (S- version)

? Gold contact pads (GS - version)