QL4036-1CG144M/883中文資料etc未分類制造商數據手冊PDF規(guī)格書

[QuickLogic]

PRODUCT SUMMARY

The QuickRAM family of ESPs (Embedded Standard Products) offers FPGA logic in combination with Dual-Port SRAM modules. QuickRAM is a 90,000 usable PLD gate ESPs. QuickRAM ESPs are fabricated on a 0.35mm four-layer metal process using QuickLogic’s patented ViaLink technology to provide a unique combination of high performance, high density, low cost, and extreme ease-of-use.

DEVICE HIGHLIGHTS

High Performance and High Density

■ Up to 90,000 Usable PLD Gates with 316 I/Os

■ 300 MHz 16-bit Counters, 400 MHz Datapaths, 160+ MHz FIFOs

■ 0.35um four-layer metal non-volatile CMOS process for smallest die sizes

High Speed Embedded SRAM

■ Up to 22 dual-port RAM modules, organized in userconfigurable 1,152-bit blocks

■ 5ns access times, each port independently accessible

■ Fast and efficient for FIFO, RAM, and ROM functions

Easy to Use / Fast Development Cycles

■ 100 routable with 100 utilization and complete pin-out stability

■ Variable-grain logic cells provide high performance and 100 utilization

■ Comprehensive design tools include high quality Verilog/ VHDL synthesis

Advanced I/O Capabilities

■ Interfaces with both 3.3 volt and 5.0 volt devices

■ PCI compliant with 3.3V and 5.0V buses for -1/-2 speed grades

■ Full JTAG boundary scan

■ Registered I/O cells with individually controlled clocks and output enables

FEATURES

Total of 316 I/O pins

■ 308 bi-directional input/output pins, PCI-compliant for 5.0 volt and 3.3 volt buses for -1/-2/-3/-4 speed grades

■ 8 high-drive input/distributed network pins

Eight Low-Skew Distributed Networks

■ Two array clock/control networks available to the logic cell flip-flop clock, set and reset inputs - each driven by an input-only pin

■ Six global clock/control networks available to the logic cell F1, clock, set and reset inputs and the input and I/O register clock, reset and enable inputs as well as the output enable control - each driven by an input-only or I/O pin, or any logic cell output or I/O cell feedback

High Performance

■ Input + logic cell + output total delays under 6 ns

■ Data path speeds exceeding 400 MHz

■ Counter speeds over 300 MHz

■ FIFO speeds over 160+ MHz

Military Reliability

■ Mil-STD-883 and Miil Temp Ceramic

■ Mil Temp Plastic - Guaranteed -55°C to 125°C