R10DS0184EJ0011中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Description

The R1Q#A7236 is a 2,097,152-word by 36-bit and the R1Q#A7218 is a 4,194,304-word by 18-bit synchronous

double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor

memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are

controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products

are suitable for applications which require synchronous operation, high speed, low voltage, high density and

wide bit configuration. These products are packaged in 165-pin plastic FBGA package.

# = B: Latency =2.5, w/o ODT # = H: Latency =2.0, w/o ODT

# = E: Latency =2.5, w/ ODT # = L: Latency =2.0, w/ ODT

Features

? Power Supply

? 1.8 V for core (VDD), 1.4 V to VDD for I/O (VDDQ)

? Clock

? Fast clock cycle time for high bandwidth

? Two input clocks (K and /K) for precise DDR timing at clock rising edges only

? Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems

? Clock-stop capability with μs restart

? I/O

? Common data input/output bus

? Pipelined double data rate operation

? HSTL I/O

? User programmable output impedance

? DLL/PLL circuitry for wide output data valid window and future frequency scaling

? Data valid pin (QVLD) to indicate valid data on the output

? Function

? Two-tick burst for low DDR transaction size

? Internally self-timed write control

? Simple control logic for easy depth expansion

? JTAG 1149.1 compatible test access port

? Package

? 165 FBGA package (15 x 17 x 1.4 mm)