SABC517A-LN中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書

? Full upward compatibility with SAB 80C517A/83C517A-5

? Up to 24 MHz external operating frequency

– 500 ns instruction cycle at 24 MHz operation

? Superset of the 8051 architecture with 8 datapointers

? On-chip emulation support logic (Enhanced Hooks Technology?)

? 32K byte on-chip ROM (with optional ROM protection)

– alternatively up to 64K byte external program memory

? Up to 64K byte external data memory

? 256 byte on-chip RAM

? Additional 2K byte on-chip RAM (XRAM)

? Seven 8-bit parallel I/O ports

? Two input ports for analog/digital input