SC28L91A1A集成電路（IC）的UART（通用異步接收器發(fā)送器）規(guī)格書PDF中文資料

DESCRIPTION

The SC28L91 is a new member of the IMPACT family of Serial Communications Controllers. It is a single channel UART operating at 3.3 and 5.0 volts Vcc, 8 or 16 byte FIFOs and is quite compatible with software of the SC28L92 and previous UARTs offered by Philips. It is a new part that is similar to our previous one channel part but is vastly improved. The improvements being: 16 character receiver, 16 character transmit FIFOs, watch dog timer for the receiver, mode register 0 is added, extended baud rate, over all faster bus and data speeds, programmable receiver and transmitter interrupts and versatile I/O structure. (The previous one channel part, SCC2691, is NOT being discontinued.)

FEATURES

? Member of IMPACT family: 3.3 to 5.0 volt , –40°C to +85°C and 68K for 80xxx bus interface for all devices.

? A full-duplex independent asynchronous receiver/transmitter

? 16 character FIFOs for each receiver and transmitter

? Pin programming selects 68K or 80xxx-bus interface

? Programmable data format

– 5 to 8 data bits plus parity

– Odd, even, no parity or force parity

– – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments

? 16-bit programmable Counter/Timer

? Programmable baud rate for each receiver and transmitter selectable from:

– 28 fixed rates: 50 to 230.4 k baud

– Other baud rates to 1 MHz at 16X

– Programmable user-defined rates derived from a programmable counter/timer

– External 1X or 16X clock

? Parity, framing, and overrun error detection

? False start bit detection

? Line break detection and generation

? Programmable channel mode

– Normal (full-duplex)

– Automatic echo

– Local loop back

– Remote loop back

– Multi-drop mode (also called ‘wake-up’ or ‘9-bit’)

? Multi-function 7-bit input port (includes IACKN)

– Can serve as clock or control inputs

– Change of state detection on four inputs

– Inputs have typically >100k pull-up resistors

– Change of state detectors for modem control

? Multi-function 8-bit output port

– Individual bit set/reset capability

– Outputs can be programmed to be status/interrupt signals

– FIFO status for DMA interface

? Versatile interrupt system

– Single interrupt output with eight maskable interrupting conditions

– Output port can be configured to provide a total of up to six separate interrupt outputs that may be wire ORed.

– Each FIFO can be programmed for four different interrupt levels

– Watch dog timer for the receiver

? Maximum data transfer rates: 1X – 1Mb/sec, 16X – 1Mb/sec

? Automatic wake-up mode for multi-drop applications

? Start-end break interrupt/status with mid-character break detect.

? On-chip crystal oscillator

? Power down mode

? Receiver time-out mode

? Single +3.3V or +5V power supply