SI5315集成電路(IC)的應用特定時鐘/定時規(guī)格書PDF中文資料
廠商型號 |
SI5315 |
參數(shù)屬性 | SI5315 封裝/外殼為24-WFQFN 裸露焊盤;包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類別為集成電路(IC)的應用特定時鐘/定時;產品描述:IC PCIE BUFFER 100MHZ 24QFN |
功能描述 | Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet |
封裝外殼 | 24-WFQFN 裸露焊盤 |
文件大小 |
416.54 Kbytes |
頁面數(shù)量 |
54 頁 |
生產廠商 | Silicon Laboratories |
企業(yè)簡稱 |
SILABS |
中文名稱 | Silicon Laboratories官網 |
原廠標識 | |
數(shù)據(jù)手冊 | |
更新時間 | 2025-1-27 17:09:00 |
SI5315規(guī)格書詳情
Description
The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inputs ranging from 8 kHz to 644.53 MHz and generates two equal frequency-multiplied clock outputs ranging from 8 kHz to 644.53 MHz. The input clock frequency and clock multiplication ratio are selectable from a table of popular SyncE and T1/E1 rates. The Si5315 is based on Silicon Laboratories third-generation DSPLL? technology, which provides any-frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter components. The DSPLL loop bandwidth is user programmable, providing jitter performance optimization at the application level.
Features
■ Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet
■ Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source
■ Two clock inputs/two clock outputs
■ Input frequency range: 8 kHz–644 MHz
■ Output frequency range: 8 kHz–644 MHz
■ Ultra low jitter: 0.23 ps RMS (1.875–20 MHz) 0.47 ps RMS (12 kHz–20 MHz)
■ Simple pin control interface
■ Selectable loop bandwidth for jitter attenuation: 60 to 8.4 kHz
■ Automatic/Manual hitless switching and holdover during loss of inputs clock
■ Programmable output clock signal format: LVPECL, LVDS, CML or CMOS
■ 40 MHz crystal or XO reference
■ Single supply: 1.8, 2.5, or 3.3 V
■ On-chip voltage regulator with high PSRR
■ Loss of lock and loss of signal alarms
■ Small size: 6 x 6 mm, 36-QFN
■ Wide temperature range: –40 to +85 oC
Applications
■ Synchronous Ethernet line cards
■ SONET OC-3/12/48 line cards
■ PON OLT/ONU
■ Carrier Ethernet switches routers
■ MSAN / DSLAM
■ T1/E1/DS3/E3 line cards
產品屬性
- 產品編號:
SI53152-A01AGMR
- 制造商:
Skyworks Solutions Inc.
- 類別:
集成電路(IC) > 應用特定時鐘/定時
- 包裝:
卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶
- PLL:
無
- 主要用途:
PCI Express(PCIe)
- 輸入:
時鐘,晶體
- 輸出:
HCSL
- 比率 - 輸入:
1:2
- 差分 - 輸入:
無/是
- 頻率 - 最大值:
100MHz
- 電壓 - 供電:
3.135V ~ 3.465V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
24-WFQFN 裸露焊盤
- 供應商器件封裝:
24-QFN(4x4)
- 描述:
IC PCIE BUFFER 100MHZ 24QFN
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
KODENSHI |
24+ |
DIP |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 | ||
Silicon |
23+ |
NA |
10019 |
專做原裝正品,假一罰百! |
詢價 | ||
KODENSHI原 |
22+23+ |
DIP |
29747 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
詢價 | ||
Silicon |
21+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開票! |
詢價 | |||
SiliconLabs |
22+ |
QFN |
44135 |
原裝正品現(xiàn)貨 |
詢價 | ||
SILICON LAB |
09+45 |
26 |
公司優(yōu)勢庫存 熱賣中! |
詢價 | |||
SILICON |
13+ |
QFN36 |
313 |
詢價 | |||
SILLICON |
17+ |
36-VFQFN |
6200 |
100%原裝正品現(xiàn)貨 |
詢價 | ||
SILICON LABS/芯科 |
23+ |
NA |
2860 |
原裝正品代理渠道價格優(yōu)勢 |
詢價 | ||
SILICON |
24+ |
QFN |
39834 |
原裝現(xiàn)貨假一賠十 |
詢價 |
相關庫存
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