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SI5315B-C-GM集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書PDF中文資料
廠商型號(hào) |
SI5315B-C-GM |
參數(shù)屬性 | SI5315B-C-GM 封裝/外殼為36-VFQFN 裸露焊盤;包裝為管件;類別為集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí);產(chǎn)品描述:IC CLOCK MULT 8KHZ-125MHZ 36QFN |
功能描述 | SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER |
封裝外殼 | 36-VFQFN 裸露焊盤 |
文件大小 |
416.55 Kbytes |
頁面數(shù)量 |
54 頁 |
生產(chǎn)廠商 | Silicon Laboratories |
企業(yè)簡稱 |
SILABS |
中文名稱 | Silicon Laboratories官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊 | |
更新時(shí)間 | 2025-1-12 14:26:00 |
SI5315B-C-GM規(guī)格書詳情
Description
The Si5315 is a jitter-attenuating clock multiplier for Gb and 10G Synchronous Ethernet, SONET/SDH, and PDH (T1/E1) applications. The Si5315 supports SyncE EEC options 1 and 2 when paired with a timing card that implements the required wander filter. The Si5315 accepts dual clock inputs ranging from 8 kHz to 644.53 MHz and generates two equal frequency-multiplied clock outputs ranging from 8 kHz to 644.53 MHz. The input clock frequency and clock multiplication ratio are selectable from a table of popular SyncE and T1/E1 rates. The Si5315 is based on Silicon Laboratories third-generation DSPLL? technology, which provides any-frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter components. The DSPLL loop bandwidth is user programmable, providing jitter performance optimization at the application level.
Features
■ Provides jitter attenuation and frequency translation between SONET/PDH and Ethernet
■ Supports ITU-T G.8262 Synchronous Ethernet equipment slave clock (EEC option 1 and 2) requirements with optional Stratum 3 compliant timing card clock source
■ Two clock inputs/two clock outputs
■ Input frequency range: 8 kHz–644 MHz
■ Output frequency range: 8 kHz–644 MHz
■ Ultra low jitter: 0.23 ps RMS (1.875–20 MHz) 0.47 ps RMS (12 kHz–20 MHz)
■ Simple pin control interface
■ Selectable loop bandwidth for jitter attenuation: 60 to 8.4 kHz
■ Automatic/Manual hitless switching and holdover during loss of inputs clock
■ Programmable output clock signal format: LVPECL, LVDS, CML or CMOS
■ 40 MHz crystal or XO reference
■ Single supply: 1.8, 2.5, or 3.3 V
■ On-chip voltage regulator with high PSRR
■ Loss of lock and loss of signal alarms
■ Small size: 6 x 6 mm, 36-QFN
■ Wide temperature range: –40 to +85 oC
Applications
■ Synchronous Ethernet line cards
■ SONET OC-3/12/48 line cards
■ PON OLT/ONU
■ Carrier Ethernet switches routers
■ MSAN / DSLAM
■ T1/E1/DS3/E3 line cards
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
SI5315B-C-GM
- 制造商:
Skyworks Solutions Inc.
- 類別:
集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)
- 系列:
DSPLL?
- 包裝:
管件
- PLL:
無
- 主要用途:
以太網(wǎng),SONET/SDH/PDH,電信
- 輸入:
CML,CMOS,LVDS,LVPECL
- 輸出:
CML,CMOS,LVDS,LVPECL
- 比率 - 輸入:
2:2
- 差分 - 輸入:
是/是
- 頻率 - 最大值:
125MHz
- 電壓 - 供電:
1.71V ~ 3.63V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
36-VFQFN 裸露焊盤
- 供應(yīng)商器件封裝:
36-QFN(6x6)
- 描述:
IC CLOCK MULT 8KHZ-125MHZ 36QFN
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
SILICON LABS/芯科 |
15+ |
QFN36 |
194 |
原裝現(xiàn)貨 |
詢價(jià) | ||
SiliconLabs |
22+ |
QFN |
44134 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
SILICON |
21+ |
QFN36 |
1346 |
只做原裝正品,不止網(wǎng)上數(shù)量,歡迎電話微信查詢! |
詢價(jià) | ||
SILICON |
22+ |
QFN36 |
56000 |
全新原裝進(jìn)口,假一罰十 |
詢價(jià) | ||
VISHAY |
2020+ |
QFN36 |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
Skyworks Solutions Inc. |
24+ |
36-VFQFN 裸露焊盤 |
25000 |
in stock時(shí)鐘/計(jì)時(shí)IC-原裝 |
詢價(jià) | ||
SILICON LABS(芯科) |
1942+ |
QFN-36(6x6) |
2532 |
向鴻只做原裝,倉庫庫存優(yōu)勢數(shù)量請確認(rèn) |
詢價(jià) | ||
SILICON |
23+ |
QFN36 |
12800 |
公司只有原裝 歡迎來電咨詢。 |
詢價(jià) | ||
SILICON |
15+ |
QFN36 |
194 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
SILICON |
2122+ |
QFN |
19990 |
全新原裝正品現(xiàn)貨,優(yōu)勢渠道可含稅,假一賠十 |
詢價(jià) |