SI5360D-AXXXXX-GM中文資料思佳訊數(shù)據(jù)手冊(cè)PDF規(guī)格書

Features

? Utilizes fifth-generation DSPLL? and MultiSynth?

technologies

- One DSPLL, two MultiSynth

? ANY input to ANY combination of output frequencies

up to 1.3 GHz

? Ultra-low phase jitter

- 55 fs RMS typ (integer mode)

- 100 fs RMS typ (fractional mode)

? Up to six differential/single-ended Inputs

? Input frequency range

- External crystal: 48 MHz to 61.44 MHz

- Differential: 30.72 MHz to 750 MHz

- LVCMOS: 30.72 MHz to 250 MHz

? 18 Outputs

? Output frequency range

- Differential: 8 kHz to 1.3 GHz

- LVCMOS: 8 kHz to 250 MHz

? Fixed or user-adjustable output formats

? Programmable delay at each output

? Simplified API interface

? Pin compatible with Si5361/2/3 jitter attenuators

and Si5401/02/03 IEEE 1588 PTP network

synchronizers

? 72 QFN 10x10 mm

? ClockBuilder? Pro Configuration Software