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SM8213AM中文資料NPC數(shù)據(jù)手冊(cè)PDF規(guī)格書

SM8213AM
廠商型號(hào)

SM8213AM

功能描述

POCSAG Decoder For Multiframe Pagers

文件大小

171.79 Kbytes

頁(yè)面數(shù)量

33 頁(yè)

生產(chǎn)廠商 Nippon Precision Circuits Inc
企業(yè)簡(jiǎn)稱

NPC

中文名稱

Nippon Precision Circuits Inc官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-1-9 9:30:00

SM8213AM規(guī)格書詳情

OVERVIEW

The SM8213AM is a POCSAG-standard (Post Office Code Standardization Advisory Group) signal processor LSI, which conforms to CCIR recommendation 584 concerning standard international wireless calling codes.

FEATURES

■ Conforms to POCSAG standard for pagers

■ 512, 1200 or 2400 bps signal speed

■ Multiframe compatible (each address individually controllable)

■ 8 addresses × 4 sub-addresses (total of 32 addresses) control (8 addresses comprise 7 actual addresses + 1 dummy address)

■ Built-in buffer memory (1 code word)

■ Supports tone, numeric or character call messages

■ Built-in input signal filter, with filter ON/OFF and 4 selectable filter characteristics

■ PLL-compatible battery saving method (BS1, BS2, BS3 outputs)

■ BS1 (RF control main output signal) 61-step setup time setting

■ BS3 (PLL setup signal) 61-step setup time setting

■ BS2 (RF DC-level adjustment signal) before/during reception selectable adjustment timing

■ 1-bit and 2-bit burst error auto-correction function

■ 25 to 75 duty factor signal coverage

■ 8 rate error detection condition settings

■ 76.8 kHz system clock (crystal oscillator)

■ 76.8 or 38.4 kHz clock output pin

■ Built-in oscillator capacitor and feedback resistor

■ 2.0 to 3.5 V operating supply voltage

■ Molybdenum-gate CMOS process realizes low power dissipation

■ 16-pin SSOP

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DIP
80000
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SNP
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850
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7800
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