SN54AHC125中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? Qualified for Automotive Applications

? EPIC? (Enhanced-Performance Implanted

CMOS) Process

? Operating Range 2-V to 5.5-V VCC

? Latch-Up Performance Exceeds 250 mA Per JESD

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2 Description

The SN74AHC125 is a quadruple bus buffer gate

featuring independent line drivers with 3-state outputs.

Each output is disabled when the associated outputenable

(OE) input is high. When OE is low, the

respective gate passes the data from the A input to

its Y output.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through

a pullup resistor; the minimum value of the resistor

is determined by the current-sinking capability of the

driver.