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SN54LS162J中文資料摩托羅拉數(shù)據(jù)手冊(cè)PDF規(guī)格書
SN54LS162J規(guī)格書詳情
The LS160A/161A/162A/163A are high-speed 4-bit synchronous count ers. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and other applications. The LS160A and LS162A count modulo 10 (BCD). The LS161A and LS163A count modulo 16 (binary.)
The LS160A and LS161A have an asynchronous Master Reset (Clear) input that overrides, and is independent of, the clock and all other control inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that overrides all other control inputs, but is active only during the rising clock edge.
? Synchronous Counting and Loading
? Two Count Enable Inputs for High Speed Synchronous Expansion
? Terminal Count Fully Decoded
? Edge-Triggered Operation
? Typical Count Rate of 35 MHz
? ESD > 3500 Volts
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TI/德州儀器 |
24+ |
CDIP16 |
58000 |
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詢價(jià) | ||
INTERSIL |
DIP |
699839 |
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詢價(jià) | |||
TI |
21+ |
CDIP16 |
40 |
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詢價(jià) | ||
TI/德州儀器 |
1212+ |
CDIP-16 |
880000 |
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詢價(jià) | ||
TI |
02+50 |
11 |
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TI |
24+ |
PLCC |
3378 |
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詢價(jià) | ||
TI |
23+ |
CDIP16 |
3200 |
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TI |
23+ |
CDIP |
5800 |
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TI |
23+ |
DIP |
4500 |
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TI/TEXAS |
23+ |
DIP陶瓷 |
8931 |
詢價(jià) |
