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SN54LS92J中文資料安森美半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

SN54LS92J
廠商型號(hào)

SN54LS92J

功能描述

DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER

文件大小

80.38 Kbytes

頁面數(shù)量

6

生產(chǎn)廠商 ON Semiconductor
企業(yè)簡稱

ONSEMI安森美半導(dǎo)體

中文名稱

安森美半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊

下載地址一下載地址二原廠數(shù)據(jù)手冊到原廠下載

更新時(shí)間

2024-11-15 9:30:00

SN54LS92J規(guī)格書詳情

The SN54/74LS90, SN54/74LS92 and SN54/74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 counters. All of the counters have a 2-input gated Master Reset (Clear), and the LS90 also has a 2-input gated Master Set (Preset 9).

? Low Power Consumption . . . Typically 45 mW

? High Count Rates . . . Typically 42 MHz

? Choice of Counting Modes . . . BCD, Bi-Quinary, Divide-by-Twelve, Binary

? Input Clamp Diodes Limit High Speed Termination Effects

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19+
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2539
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22
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39890
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2000
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TI/德州儀器
21+
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10000
只做正品原裝現(xiàn)貨
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