SN74AHC125集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

SN74AHC125屬于集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器。由德州儀器制造生產(chǎn)的SN74AHC125緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。

1 Features

? Qualified for Automotive Applications

? EPIC? (Enhanced-Performance Implanted

CMOS) Process

? Operating Range 2-V to 5.5-V VCC

? Latch-Up Performance Exceeds 250 mA Per JESD

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2 Description

The SN74AHC125 is a quadruple bus buffer gate

featuring independent line drivers with 3-state outputs.

Each output is disabled when the associated outputenable

(OE) input is high. When OE is low, the

respective gate passes the data from the A input to

its Y output.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through

a pullup resistor; the minimum value of the resistor

is determined by the current-sinking capability of the

driver.