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SN74AHCT164-Q1中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

SN74AHCT164-Q1
廠商型號

SN74AHCT164-Q1

功能描述

SN74AHCT164-Q1 Automotive 8-Bit Parallel-Out Serial Shift Register

文件大小

1.41084 Mbytes

頁面數(shù)量

23

生產(chǎn)廠商 Texas Instruments(TI)
企業(yè)簡稱

TI1德州儀器

中文名稱

德州儀器 (TI)官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-17 18:45:00

SN74AHCT164-Q1規(guī)格書詳情

1 Features

? AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

? Available in wettable flank QFN package

? Operating range 4.5V to 5.5V VCC

? TTL-Compatible inputs

? Low delay, 14ns max (VCC = 5V, CL = 50pF)

? Latch-up performance exceeds 250mA

per JESD 17

2 Applications

? Increase the number of outputs on a

microcontroller

? Store up to 8 bits of data temporarily

3 Description

The SN74AHCT164-Q1 is an 8-bit shift register with

AND-gated serial inputs and an asynchronous clear

(CLR) input. Outputs are directly connected to the

internal shift register, resulting in immediate output

changes as values are shifted into the register. The

gated serial (A and B) inputs permit complete control

over incoming data; a low at either input inhibits entry

of the new data and resets the first flip-flop to the

low level at the next clock (CLK) pulse. A high-level

input enables the other input, which then determines

the state of the first flip-flop. Data at the serial inputs

can be changed while CLK is high or low, provided the

minimum set-up time requirements are met. Clocking

occurs on the low-to-high-level transition of CLK.

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