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SN74LS373集成電路(IC)的鎖存器規(guī)格書PDF中文資料

SN74LS373
廠商型號

SN74LS373

參數(shù)屬性

SN74LS373 封裝/外殼為20-SOIC(0.295",7.50mm 寬);包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類別為集成電路(IC)的鎖存器;產(chǎn)品描述:IC OCT D-TYPE LATCH 20-SOIC

功能描述

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
IC OCT D-TYPE LATCH 20-SOIC

文件大小

1.58154 Mbytes

頁面數(shù)量

32

生產(chǎn)廠商 Texas Instruments
企業(yè)簡稱

TI1德州儀器

中文名稱

德州儀器官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

原廠下載下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-3 11:02:00

SN74LS373規(guī)格書詳情

SN74LS373屬于集成電路(IC)的鎖存器。由德州儀器制造生產(chǎn)的SN74LS373鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲(chǔ)設(shè)備,但是不同之處在于,在鎖存使能(或類似命名)信號處于有效邏輯狀態(tài)的任何時(shí)間,保持的邏輯狀態(tài)都可以改變?!巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號有效時(shí)反映輸入的當(dāng)前狀態(tài),而相反的是,狀態(tài)僅在保持狀態(tài)已固定時(shí)改變。

Choice of Eight Latches or Eight D-Type

Flip-Flops in a Single Package

3-State Bus-Driving Outputs

Full Parallel Access for Loading

Buffered Control Inputs

Clock-Enable Input Has Hysteresis to

Improve Noise Rejection (’S373 and ’S374)

P-N-P Inputs Reduce DC Loading on Data

Lines (’S373 and ’S374)

description

These 8-bit registers feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The

high-impedance 3-state and increased

high-logic-level drive provide these registers with

the capability of being connected directly to and

driving the bus lines in a bus-organized system

without need for interface or pullup components.

These devices are particularly attractive for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

The eight latches of the ’LS373 and ’S373 are

transparent D-type latches, meaning that while

the enable (C or CLK) input is high, the Q outputs

follow the data (D) inputs. When C or CLK is taken

low, the output is latched at the level of the data

that was set up.

The eight flip-flops of the ’LS374 and ’S374 are

edge-triggered D-type flip-flops. On the positive

transition of the clock, the Q outputs are set to the

logic states that were set up at the D inputs.

Schmitt-trigger buffered inputs at the enable/clock lines of the ’S373 and ’S374 devices simplify system design

as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered

output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic

levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly.

OC does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new

data can be entered, even while the outputs are off.

產(chǎn)品屬性

更多
  • 產(chǎn)品編號:

    SN74LS373DWR

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 鎖存器

  • 系列:

    74LS

  • 包裝:

    卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶

  • 邏輯類型:

    D 型透明鎖存器

  • 電路:

    8:8

  • 輸出類型:

    三態(tài)

  • 電壓 - 供電:

    4.75V ~ 5.25V

  • 延遲時(shí)間 - 傳播:

    12ns

  • 電流 - 輸出高、低:

    2.6mA,24mA

  • 工作溫度:

    0°C ~ 70°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    20-SOIC(0.295",7.50mm 寬)

  • 供應(yīng)商器件封裝:

    20-SOIC

  • 描述:

    IC OCT D-TYPE LATCH 20-SOIC

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
TI
23+
SO-20
7000
絕對全新原裝!100%保質(zhì)量特價(jià)!請放心訂購!
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24+
原廠原封
6523
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ADI
23+
SOP-5.2
8000
只做原裝現(xiàn)貨
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TI/德州儀器
23+
SOP-5.2
50000
全新原裝正品現(xiàn)貨,支持訂貨
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PDIP20
710
專營鐵帽CANCDIP
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TI
SOP20
68500
一級代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨
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TI
24+
SOP5.2mm
6868
原裝現(xiàn)貨,可開13%稅票
詢價(jià)
TI
22+23+
SOP-20
24407
絕對原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨
詢價(jià)
TI
23+
1753
專做原裝正品,假一罰百!
詢價(jià)
TI
22+
SOP5.2mm
10000
原裝正品優(yōu)勢現(xiàn)貨供應(yīng)
詢價(jià)