SN74LV1T02集成電路（IC）的門反相器規(guī)格書PDF中文資料

SN74LV1T02屬于集成電路（IC）的門反相器。由德州儀器制造生產(chǎn)的SN74LV1T02門和反相器邏輯柵極和逆變器系列中的產(chǎn)品對(duì)單個(gè)邏輯信號(hào)執(zhí)行基本邏輯運(yùn)算（例如 AND、NOT、OR 等）。與觸發(fā)器不同，它們不能夠存儲(chǔ)信息，不會(huì)對(duì)提供給其輸入的信號(hào)立即做出響應(yīng)。雖然早就被集成電路實(shí)施形式所取代，以用于實(shí)現(xiàn)復(fù)雜功能，但分立柵極仍可在僅需要非常簡單邏輯功能的情況下使用。

1 Features

? AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

? Wide operating range of 1.8V to 5.5V

? Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

? 1.2V to 1.8V

? 1.5V to 2.5V

? 1.8V to 3.3V

? 3.3V to 5.0V

– Down translation:

? 5.0V, 3.3V, 2.5V to 1.8V

? 5.0V, 3.3V to 2.5V

? 5.0V to 3.3V

? 5.5V tolerant input pins

? Supports standard pinouts

? Up to 150Mbps with 5V or 3.3V VCC

? Latch-up performance exceeds 250mA

per JESD 17

2 Applications

? Enable or disable a digital signal

? Controlling an indicator LED

? Translation between communication modules and

system controllers

3 Description

The SN74LV1T02-Q1 is a 2-input NOR Gate. Each

gate performs the Boolean function Y = A + B in

positive logic. The output level is referenced to the

supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V,

and 5V CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example, 1.2V input to 1.8V output or 1.8V input

to 3.3V output). In addition, the 5V tolerant input pins

enable down translation (for example, 3.3V to 2.5V

output).