SN74LV1T32集成電路（IC）的門反相器規(guī)格書PDF中文資料

SN74LV1T32屬于集成電路（IC）的門反相器。由德州儀器制造生產(chǎn)的SN74LV1T32門和反相器邏輯柵極和逆變器系列中的產(chǎn)品對單個邏輯信號執(zhí)行基本邏輯運算（例如 AND、NOT、OR 等）。與觸發(fā)器不同，它們不能夠存儲信息，不會對提供給其輸入的信號立即做出響應(yīng)。雖然早就被集成電路實施形式所取代，以用于實現(xiàn)復(fù)雜功能，但分立柵極仍可在僅需要非常簡單邏輯功能的情況下使用。

1 Features

? AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

? Wide operating range of 1.8 V to 5.5 V

? Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

? 1.2-V to 1.8-V

? 1.5-V to 2.5-V

? 1.8-V to 3.3-V

? 3.3-V to 5.0-V

– Down translation:

? 5.0-V, 3.3-V, 2.5-V to 1.8-V

? 5.0-V, 3.3-V to 2.5-V

? 5.0-V to 3.3-V

? 5.5-V tolerant input pins

? Supports standard pinouts

? Up to 150Mbps with 5-V or 3.3-V VCC

? Latch-up performance exceeds 250 mA

per JESD 17

2 Applications

? Enable or disable a digital signal

? Controlling an indicator LED

? Translation between communication modules and

system controllers

3 Description

The SN74LV1T32-Q1 is a 2-input OR Gate. Each

gate performs the Boolean function Y = A + B in

positive logic. The output level is referenced to the

supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V,

and 5-V CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example, 1.2-V input to 1.8-V output or 1.8-V

input to 3.3-V output). In addition, the 5-V tolerant

input pins enable down translation (for example, 3.3-V

to 2.5-V output).