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74LVC273

OctalD-typeflip-flopwithreset;positive-edgetrigger

DESCRIPTION The74LVC273isalow-voltageSi-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC273haseightedge-triggered,D-typeflip-flopswithindividualDinputsandQoutputs.Thecommonclock(CP)andmasterreset(MR)inputsloadandreset(clear)a

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC273

OctalD-typeflip-flopwithreset;positive-edgetrigger

1.Generaldescription The74LVC273isanoctalpositive-edgetriggeredD-typeflip-flop.Thedevicefeaturesclock(CP) andmasterreset(MR)inputs.TheoutputsQnwillassumethestateoftheircorrespondingDinputs thatmeettheset-upandholdtimerequirementsontheLOW-to-HIGHclock(C

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74LVC273A

OCTALD-TYPEFLIP-FLOPWITHCLEAR

DIODES

Diodes Incorporated

74LVC273BQ

OctalD-typeflip-flopwithreset;positive-edgetrigger

1.Generaldescription The74LVC273isanoctalpositive-edgetriggeredD-typeflip-flop.Thedevicefeaturesclock(CP) andmasterreset(MR)inputs.TheoutputsQnwillassumethestateoftheircorrespondingDinputs thatmeettheset-upandholdtimerequirementsontheLOW-to-HIGHclock(C

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74LVC273D

OctalD-typeflip-flopwithreset;positive-edgetrigger

1.Generaldescription The74LVC273isanoctalpositive-edgetriggeredD-typeflip-flop.Thedevicefeaturesclock(CP) andmasterreset(MR)inputs.TheoutputsQnwillassumethestateoftheircorrespondingDinputs thatmeettheset-upandholdtimerequirementsontheLOW-to-HIGHclock(C

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74LVC273D

OctalD-typeflip-flopwithreset;positive-edgetrigger

DESCRIPTION The74LVC273isalow-voltageSi-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC273haseightedge-triggered,D-typeflip-flopswithindividualDinputsandQoutputs.Thecommonclock(CP)andmasterreset(MR)inputsloadandreset(clear)a

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC273DB

OctalD-typeflip-flopwithreset;positive-edgetrigger

DESCRIPTION The74LVC273isalow-voltageSi-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC273haseightedge-triggered,D-typeflip-flopswithindividualDinputsandQoutputs.Thecommonclock(CP)andmasterreset(MR)inputsloadandreset(clear)a

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC273PW

OctalD-typeflip-flopwithreset;positive-edgetrigger

1.Generaldescription The74LVC273isanoctalpositive-edgetriggeredD-typeflip-flop.Thedevicefeaturesclock(CP) andmasterreset(MR)inputs.TheoutputsQnwillassumethestateoftheircorrespondingDinputs thatmeettheset-upandholdtimerequirementsontheLOW-to-HIGHclock(C

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國(guó))有限公司

74LVC273PW

OctalD-typeflip-flopwithreset;positive-edgetrigger

DESCRIPTION The74LVC273isalow-voltageSi-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC273haseightedge-triggered,D-typeflip-flopswithindividualDinputsandQoutputs.Thecommonclock(CP)andmasterreset(MR)inputsloadandreset(clear)a

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC273PWDH

OctalD-typeflip-flopwithreset;positive-edgetrigger

DESCRIPTION The74LVC273isalow-voltageSi-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. The74LVC273haseightedge-triggered,D-typeflip-flopswithindividualDinputsandQoutputs.Thecommonclock(CP)andmasterreset(MR)inputsloadandreset(clear)a

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

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