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74LVC74A

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC74A

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74LVC74A

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LVC74ABQ

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74LVC74ABQ

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LVC74AD

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC74AD

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74LVC74AD

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LVC74ADB

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74LVC74ADB

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC74APW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

74LVC74APW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74LVC74APW

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74LVC74APWDH

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HD74LVC74

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac

HitachiHitachi Semiconductor

日立日立公司

HD74LVC74

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LVC74FPEL

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LVC74TELL

DualD-typeFlipFlopswithPresetandClear

Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

RD74LVC74B

DualD-typeFlipFlopswithPresetandClear

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

RD74LVC74BFPEL

DualD-typeFlipFlopswithPresetandClear

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

詳細(xì)參數(shù)

  • 型號(hào):

    SN74LVC74DBLE

  • 制造商:

    Texas Instruments

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更多SN74LVC74DBLE供應(yīng)商 更新時(shí)間2024-12-28 11:02:00