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首頁 >SN74LVC74DBLE>規(guī)格書列表
零件編號(hào) | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半導(dǎo)體公司 | nxp | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
DualD-typeflip-flopwithsetandreset;positive-edgetrigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?InaccordancewithJEDECstandardno.8-1A. ?Inputsacceptvoltagesupto5.5V ?CMOSlowpowerc | PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | ||
DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
DualD-typeFlipFlopswithPresetandClear Description TheHD74LVC74hasindependentdata,preset,clear,andclockinputsQandQoutputsina14pinpackage.Thelogiclevelpresentatthedatainputistransferredtotheoutputduringthepositivegoingtransitionoftheclockpulse.Presetandclearareindependentoftheclockandac | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
DualD-typeFlipFlopswithPresetandClear | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS | ||
DualD-typeFlipFlopswithPresetandClear | RENESASRenesas Technology Corp 瑞薩瑞薩科技有限公司 | RENESAS |
詳細(xì)參數(shù)
- 型號(hào):
SN74LVC74DBLE
- 制造商:
Texas Instruments
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI |
22+ |
SSOP |
2500 |
強(qiáng)調(diào)現(xiàn)貨,隨時(shí)查詢! |
詢價(jià) | ||
TI |
24+ |
SSOP |
1006 |
詢價(jià) | |||
TI |
24+ |
SSOP |
2987 |
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電! |
詢價(jià) | ||
TI |
2016+ |
SOP |
6528 |
只做原廠原裝現(xiàn)貨!終端客戶個(gè)別型號(hào)可以免費(fèi)送樣品! |
詢價(jià) | ||
TI |
23+ |
SOP |
7000 |
絕對(duì)全新原裝!100%保質(zhì)量特價(jià)!請(qǐng)放心訂購! |
詢價(jià) | ||
TI |
16+ |
NA |
8800 |
原裝現(xiàn)貨,貨真價(jià)優(yōu) |
詢價(jià) | ||
TI |
2020+ |
原廠封裝 |
350000 |
100%進(jìn)口原裝正品公司現(xiàn)貨庫存 |
詢價(jià) | ||
TI |
20+ |
1562 |
全新現(xiàn)貨熱賣中歡迎查詢 |
詢價(jià) | |||
TI |
2023+ |
80000 |
一級(jí)代理/分銷渠道價(jià)格優(yōu)勢(shì) 十年芯程一路只做原裝正品 |
詢價(jià) | |||
TI |
21+ |
原廠原包裝 |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) |
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