SP6200ER-3-3中文資料西伯斯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1μF ceramic output capacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature is provided on all versions.

FEATURES

■ Tiny DFN Package (2mmX3mm)

■ Low Dropout Voltage: 160mV @ 100mA

■ High Output Voltage Accuracy: 2

■ Ultra Low Shutdown Current: 1μA Max

■ Ultra Low GND Current:

? 200μA @ 200mA Load

? 28μA @ 100μA Load

■ Extremely Tight Load and Line Regulation

■ Current and Thermal Limiting

■ RESET Output (VOUT good)

■ Logic-Controlled Electronic Enable

■ Unconditionally Stable with 1μF Ceramic

■ Fixed Outputs:

? 1.5V, 1.8V, 2.5V, 2.7V, 2.85V, 3.0V, 3.3V, 3.5V, 5V

■ Adjustable Output Available

APPLICATIONS

■ Cellular Telephones

■ Laptop, Notebooks and Palmtop Computers

■ Battery-Powered Equipment

■ Consumer/ Personal Electronics

■ SMPS Post-Regulator

■ DC-to-DC Modules

■ Medical Devices

■ Data Cable

■ Pagers