71V2578YS150PF中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Features

◆ 128K x 36, 256K x 18 memory configurations

◆ Supports high system speed:

Commercial and Industrial:

– 150MHz 3.8ns clock access time

– 133MHz 4.2ns clock access time

◆ LBO input selects interleaved or linear burst mode

◆ Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

◆ 3.3V core power supply

◆ Power down controlled by ZZ input

◆ 2.5V I/O

◆ Optional - Boundary Scan JTAG Interface (IEEE 1149.1

compliant)

◆ Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball

grid array (fBGA)