SSM6515BCBZRL7中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書

GENERAL DESCRIPTION

The SSM6515 is a fully integrated, high efficiency, mono Class-D

audio amplifier with digital input that is ideally suited for use in

wireless headphones. The application circuit requires few external

components and operates from a 1.8 V (PVDD) supply and a 1.2 V

to 1.8 V (IOVDD) supply. With 1.8 V signaling, these can be shared.

It can deliver 85 mW of continuous output power into a 16 Ω load

with <1 total harmonic distortion plus noise (THD + N).

The SSM6515 features a high efficiency, low noise modulation

scheme that requires no external inductor/capacitor (LC) output

filters. This scheme continues to provide high efficiency even at

very low output power resulting in battery life savings compared

to conventional headphone amplifiers. The device operates with

> 90 efficiency at 55 mW into a 16 Ω load and it has a signal-tonoise

ratio (SNR) of 113 dB, A weighted. Spread spectrum, stable

common-mode pulse density modulation provides a much lower

electromagnetic interference (EMI) radiated emissions compared

with other Class-D architectures.

The digital input eliminates the need of an external digital-to-analog

converter (DAC). The SSM6515 has a micropower shutdown mode

with a typical shutdown current of 6 μA at the 1.8 V PVDD supply

and can automatically power down with no input. The device also

includes pop and click suppression circuitry that minimizes voltage

glitches at the output during turn on and turn off. Inputs support

various serial audio formats, including I2S, time division multiplexing

(TDM), and pulse density modulation (PDM).

The SSM6515 is designed to operate with an I2C control interface

or in standalone mode and specified over the temperature range

of ?40°C to +85°C. The device has built-in output short-circuit

protection. The SSM6515 is available in a halide free, 11-ball, 0.984

mm × 1.444 mm, 0.35 mm pitch wafer-level chip scale package

(WLCSP).

Note that throughout this data sheet, multifunction pins are referred

to by the entire pin name or by a single function of the pin.

FEATURES

? Filterless digital input, mono differential output Class-D amplifier

with 3-level Σ-Δ modulation optimized for headphone drive

? Operates from single 1.8 V supply

? 80 mW output power, 16 Ω load at <0.1 THD + N

? 2.57 μV rms noise, 113 dB A weighted signal-to-noise ratio and

dynamic range

? 0.003 THD + N at 30 mW, 1 kHz output 32 Ω load

? I2C control with up to 4 pin selectable addresses or standalone

operation

? Multiple serial data formats

? TDM, I2S, or left justified slave

? PDM input operating from 2.8224 MHz to 12.288 MHz

? Support sample rates from 8 kHz to 768 kHz

? 3.9 μs latency with 6 MHz PDM input

? Flexible digital gain adjustment

? DC blocking high-pass filter with programmable corner frequency

? 1.55 mW typical idle power in high performance mode

? Low power modes for reduced power consumption

? Flexible output gain limiter and clipping

? Auto power-down feature with zero digital input

? Short-circuit protection

? Pop and click suppression

? User-selectable ultralow EMI emissions mode

? Power-on reset

? 1.8 V PVDD supply

? 1.2 V to 1.8 V IOVDD supply

? 11-ball, 0.984 mm × 1.444 mm, 0.35 mm pitch WLCSP

APPLICATIONS

? Wireless headphones

? Active noise canceling headphones

? Smartphone earpiece speakers

? Hearing assistance devices

? Portable electronics