SST31LF021中文資料SST數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

PRODUCT DESCRIPTION

The SST31LF021/021E devices are a 256K x8 CMOS flash memory bank combined with a 128K x8 or 32K x8 CMOS SRAM memory bank manufactured with SST’s proprietary, high performance SuperFlash technology. Two pinout standards are available for these devices. The SST31LF021 conform to JEDEC standard flash pinouts and the SST31LF021E conforms to standard EPROM pinouts. The SST31LF021/021E devices write (SRAM or flash) with a 3.0-3.6V power supply. The monolithic SST31LF021/021E devices conform to Software Data Protect (SDP) commands for x8 EEPROMs.

FEATURES:

? Monolithic Flash + SRAM ComboMemory

– SST31LF021/021E: 256K x8 Flash + 128K x8 SRAM

? Single 3.0-3.6V Read and Write Operations

? Concurrent Operation

– Read from or Write to SRAM while Erase/Program Flash

? Superior Reliability

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

? Low Power Consumption:

– Active Current: 10 mA (typical) for Flash and 20 mA (typical) for SRAM Read

– Standby Current: 10 μA (typical)

? Flash Sector-Erase Capability

– Uniform 4 KByte sectors

? Latched Address and Data for Flash

? Fast Read Access Times:

– SST31LF021 Flash: 70 ns SRAM: 70 ns

– SST31LF021E Flash: 300 ns SRAM: 300 ns

? Flash Fast Erase and Byte-Program:

– Sector-Erase Time: 18 ms (typical)

– Bank-Erase Time: 70 ms (typical)

– Byte-Program Time: 14 μs (typical)

– Bank Rewrite Time: 4 seconds (typical)

? Flash Automatic Erase and Program Timing

– Internal VPP Generation

? Flash End-of-Write Detection

– Toggle Bit

– Data# Polling

? CMOS I/O Compatibility

? JEDEC Standard Command Set

? Package Available

– 32-lead TSOP (8mm x 14mm)