SST38VF6404集成電路（IC）的存儲(chǔ)器規(guī)格書(shū)PDF中文資料

SST38VF6404屬于集成電路（IC）的存儲(chǔ)器。由微芯科技股份有限公司制造生產(chǎn)的SST38VF6404存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

The SST38VF6401/6402/6403/6404 are 4M x16 CMOS Advanced Multi-Purpose

Flash Plus (Advanced MPF+) devices manufactured with proprietary, high-performance

CMOS Super- Flash technology. The split-gate cell design and thick-oxide

tunneling injector attain better reliability and manufacturability compared with

alternate approaches. The SST38VF6401/6402/6403/6404 write (Program or

Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard

pin assignments for x16 memories.

Features

? Organized as 4M x16

? Single Voltage Read and Write Operations

– 2.7-3.6V

? Superior Reliability

– Endurance: 100,000 Cycles minimum

– Greater than 100 years Data Retention3

? Low Power Consumption (typical values at 5 MHz)

– Active Current: 4 mA (typical)

– Standby Current: 3 μA (typical)

– Auto Low Power Mode: 3 μA (typical)

? 128-bit Unique ID

? Security-ID Feature

– 256 Word, user One-Time-Programmable

? Protection and Security Features

– Hardware Boot Block Protection/WP# Input Pin, Uniform

(32 KWord) and Non-Uniform (8 KWord) options

available

– User-controlled individual block (32 KWord) protection,

using software only methods

– Password protection

? Hardware Reset Pin (RST#)

? Fast Read and Page Read Access Times:

– 90 ns Read access time

– 25 ns Page Read access times

- 4-Word Page Read buffer

? Latched Address and Data

? Fast Erase Times:

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 40 ms (typical)

? Erase-Suspend/-Resume Capabilities

? Fast Word and Write-Buffer Programming Times:

– Word-Program Time: 7 μs (typical)

– Write Buffer Programming Time: 1.75 μs / Word (typical)

- 16-Word Write Buffer

? Automatic Write Timing

– Internal VPP Generation

? End-of-Write Detection

– Toggle Bits

– Data# Polling

– RY/BY# Output

? CMOS I/O Compatibility

? JEDEC Standard

– Flash EEPROM Pinouts and command sets

? CFI Compliant

? Packages Available

– 48-lead TSOP

– 48-ball TFBGA

? All devices are RoHS compliant