ST40RA中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

Overview

The ST40RA is the first member of the ST40 family. Based on the SH-4, SuperH CPU core from SuperH Inc, the ST40RA is designed to work as a standalone device, or as part of a two chip solution for application specific systems. Example applications the ST40RA is designed for include digital consumer, embedded communications, industrial and automotive. The high connectivity of the ST40 through its PCI bus and its dual memory uses makes it a versatile device, ideal for data-intensive and high performance applications.

System features

■32-bit SuperH CPU

●64-bit hardware FPU (1.16 GFLOPS)

●128-bit vector unit for matrix manipulations

●166 MHz, 300 MIPS (DMIPS 1.1)

●Up to 664 Mbytes/s CPU bandwidth

●Direct mapped, on-chip, ICache (8 Kbytes) and DCache(16 Kbytes)

■High-performance 5-channel DMA engine, supporting 1D or 2D block moves and linked lists

■SuperHyway internal interconnect

●High throughput, low latency, split transaction packet router

■Memory protection and VM system support

●64-entry unified TLB, 4-entry instruction TLB

●4 Gbytes address space

■Standard ST40 peripherals

●2 synchronous serial ports with FIFO (SCIF)

●Timers and a real-time clock IO devices

●Mailbox register for interprocessor communication

●Additional PIO Bus interfaces

■Local memory interface SDRAM & DDR SDRAM

●Up to 100 MHz (1.6 Gbytes/s peak throughput)

■PCI interface - 32-bit, 66/33 MHz, 3.3 V

■Enhanced memory interface (EMI)

●32-bit bus, up to 83 MHz, for attaching peripherals

●High-speed, sync mode, burst flash ROM support

●SDRAM support

●MPX initiator and target interface

●Programmable MPX bus arbiter