ST72F521AR9T6集成電路（IC）的微控制器規(guī)格書(shū)PDF中文資料

ST72F521AR9T6屬于集成電路（IC）的微控制器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的ST72F521AR9T6微控制器微控制器產(chǎn)品是相對(duì)復(fù)雜的用戶(hù)可編程數(shù)字邏輯器件。這些產(chǎn)品與視為微控制器的器件密切相關(guān)，兩者之間的區(qū)別主要體現(xiàn)在制造商選擇的用詞。不過(guò)按照傳統(tǒng)，微控制器集成了工作存儲(chǔ)器，也更可能包含混合信號(hào)外設(shè)，并且往往與更簡(jiǎn)單的軟件范例結(jié)合使用，旨在重復(fù)執(zhí)行一系列預(yù)定義的任務(wù)。

INTRODUCTION

The ST72F521 and ST72521B devices are members of the ST7 microcontroller family designed for mid-range applications with a CAN bus interface(Controller Area Network).

All devices are based on a common industry standard 8-bit core, featuring an enhanced instruc tion set and are available with FLASH or ROM program memory.

■ Memories

– 32K to 60K dual voltage High Density Flash (HDFlash) or ROM with read-out protection capability. In-Application Programming and In-Circuit Programming for HDFlash devices

– 1K to 2K RAM

– HDFlash endurance: 100 cycles, data retention: 20 years at 55°C

■ Clock, Reset And Supply Management

– Enhanced low voltage supervisor (LVD) for main supply and auxiliary voltage detector (AVD) with interrupt capability – Clock sources: crystal/ceramic resonator os cillators, internal RC oscillator and bypass for external clock

– PLL for 2x frequency multiplication

– Four power saving modes: Halt, Active-Halt, Wait and Slow

■ Interrupt Management

– Nested interrupt controller

– 14 interrupt vectors plus TRAP and RESET

– Top Level Interrupt (TLI) pin

– 15 external interrupt lines (on 4 vectors)

■ Up to 64 I/O Ports

– 48 multifunctional bidirectional I/O lines

– 34 alternate function lines

– 16 high sink outputs

■ 5 Timers

– Main Clock Controller with: Real time base, Beep and Clock-out capabilities

– Configurable watchdog timer

– Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes – 8-bit PWM Auto-Reload timer with: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

■ 4 Communications Interfaces

– SPI synchronous serial interface

– SCI asynchronous serial interface

– I2C multimaster interface (SMbus V1.1 compliant)

– CAN interface (2.0B Passive)

■ Analog periperal (low current coupling)

– 10-bit ADC with 16 input robust input ports

■ Instruction Set

– 8-bit Data Manipulation

– 63 Basic Instructions

– 17 main Addressing Modes

– 8 x 8 Unsigned Multiply Instruction

■ Development Tools

– Full hardware/software development package

– In-Circuit Testing capability