DESCRIPTION

The STLVDS9637, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a ±100mV differential input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes.

■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD

■ OPERATES WITH A SINGLE 3.3V SUPPLY

■ DESIGNED FOR SIGNALING RATE UP TO 400Mbps

■ DIFFERENTIAL INPUT THRESHOLDS ±100mV MAX

■ TYPICAL PROPAGATION DELAY TIME OF 2.5ns

■ POWER DISSIPATION 60mW TYPICAL PER RECEIVER AT 200MHz

■ LOW VOLATGE TTL (LVTTL) LOGIC OUTPUT LEVELS

■ OPEN CIRCUIT FAIL SAFE

■ ESD PROTECTION:

7KV RECEIVER PINS

3KV ALL PINS VS GND

STLVDS9637BD屬于集成電路（IC） > 驅(qū)動(dòng)器，接收器，收發(fā)器。意法半導(dǎo)體（ST）集團(tuán)制造生產(chǎn)的STLVDS9637BD驅(qū)動(dòng)器，接收器，收發(fā)器該系列產(chǎn)品的主要功能是提供必需的硬件資源，以通過(guò)延長(zhǎng)電纜或印制線進(jìn)行通信。確切的功能會(huì)因所采用的通信協(xié)議而異，可能包括諸如瞬態(tài)抑制之類(lèi)的功能，這些功能對(duì)于通信用途可能并非絕對(duì)必要，但對(duì)于可能的使用環(huán)境卻是明智之選。