STM32G0B1CCT6TR中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Features

? Core: Arm? 32-bit Cortex?-M0+ CPU,

frequency up to 64 MHz

? -40°C to 85°C/105°C/125°C operating

temperature

? Memories

– Up to 512 Kbytes of Flash memory with

protection and securable area, two banks,

read-while-write support

– 144 Kbytes of SRAM (128 Kbytes with HW

parity check)

? CRC calculation unit

? Reset and power management

– Voltage range: 1.7 V to 3.6 V

– Separate I/O supply pin (1.6 V to 3.6 V)

– Power-on/Power-down reset (POR/PDR)

– Programmable Brownout reset (BOR)

– Programmable voltage detector (PVD)

– Low-power modes:

Sleep, Stop, Standby, Shutdown

– VBAT supply for RTC and backup registers

? Clock management

– 4 to 48 MHz crystal oscillator

– 32 kHz crystal oscillator with calibration

– Internal 16 MHz RC with PLL option (±1 )

– Internal 32 kHz RC oscillator (±5 )

? Up to 94 fast I/Os

– All mappable on external interrupt vectors

– Multiple 5 V-tolerant I/Os

? 12-channel DMA controller with flexible

mapping

? 12-bit, 0.4 μs ADC (up to 16 ext. channels)

– Up to 16-bit with hardware oversampling

– Conversion range: 0 to 3.6V

? Two 12-bit DACs, low-power sample-and-hold

? Three fast low-power analog comparators, with

programmable input and output, rail-to-rail

? 15 timers (two 128 MHz capable): 16-bit for

advanced motor control, one 32-bit and six 16-

bit general-purpose, two basic 16-bit, two lowpower

16-bit, two watchdogs, SysTick timer

? Calendar RTC with alarm and periodic wakeup

from Stop/Standby/Shutdown

? Communication interfaces

– Three I2C-bus interfaces supporting Fastmode

Plus (1 Mbit/s) with extra current

sink, two supporting SMBus/PMBus and

wakeup from Stop mode

– Six USARTs with master/slave

synchronous SPI; three supporting

ISO7816 interface, LIN, IrDA capability,

auto baud rate detection and wakeup

feature

– Two low-power UARTs

– Three SPIs (32 Mbit/s) with 4- to 16-bit

programmable bitframe, two multiplexed

with I2S interface

– HDMI CEC interface, wakeup on header

? USB 2.0 FS device (crystal-less) and host

controller

? USB Type-C? Power Delivery controller

? Two FDCAN controllers

? Development support: serial wire debug (SWD)

? 96-bit unique ID

? All packages ECOPACK 2 compliant