SY10H641AJCTR中文資料麥瑞半導體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The SY10/100H641A are single supply, low skew translating 1:9 clock drivers. Devices in the Synergy H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance.

The devices feature a 24mA TTL output stage with AC performance specified into a 50pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW.

The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels.

FEATURES

■ Input frequencies up to 80MHz

■ PECL-to-TTL version of popular ECLinPS E111

■ Guaranteed low skew specification

■ Latched input

■ Differential ECL internal design

■ VBB output for single-ended operation

■ Single +5V supply

■ Reset/enable

■ Extra TTL and ECL power/ground pins

■ Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx)

■ ESD protection of 2000V

■ Fully compatible with Motorola MC10H641/100H641

■ Available in 28-pin PLCC package