TC514258P中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The TC514258P/J/Z is the new generation dynamic

RAM organized 262,144 words by 4 bits. The TC514258

P/J/Z utilizes TOSHIBA's CMOS Silicon gate process

technology as well as advanced circuit techniques to

provide wide operating margins, both internally and to

the system user. Multiplexed address inputs permit the

TC514258P/J/Z to be packaged in a standard 20 pin

plastic DIP and 20/26 pin plastic SOJ and 20/19 pin

plastic ZIP. The package size provides high system bit

densities and is compatible with widely available

automated testing and insertion equipment. System.

oriented features include single power supply of 5V ±

10 tolerance, direct interfacing capability with high

performance logic families such as Schottky TTL.

FEATURES

262,144 word by 4 bit organization

Fast access time and cycle time

TRAC

TAA

ICAC

TRC

tsc

RAS Access Time

Column Address Access

Time

CS Access Time

Cycle Time

Static Column Mode

Cycle Time

TC514258P/J/Z-85-10-12

100ns

50ns

30ns

190ns

55ns

85ns

45ns

30ns

165ns

50ns

120ns

60ns

35ns

220ns

65ns

Single power supply of 5V ± 10 with a built-in VBB

generator

? Low Power

413mW MAX. Operating (TC514258P/J/Z-85)

358mW MAX. Operating (TC514258P/J/Z-10)

303mW MAX. Operating (TC514258P/J/Z-12)

5.5mW MAX. Standby

Outputs unlatched at cycle end allows two-dimensional

chip selection

Read-Modify-Write, CS before RAS refresh, RAS-only

refresh, Hidden refresh and Static Column Mode capa-

bility

All inputs and outputs TTL complatible

512 refresh cycles/8ms

Package Plastic DIP

TC514258P

Plastic SOJ

TC514258J

Plastic ZIP TC514258Z