TC55328AP-35中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

Description

The TC55328AP/AJ is a 262,144 bit high speed CMOS static random access memory organized as 32,768 words by 8 bits and

operated from a single 5V supply. Toshiba's advanced CMOS technology and circuit design enable high speed operation.

The TC55328AP/AJ features low power dissipation when the device is deselected using chip enable (CE) and has an output

enable input (OE) for fast memory access. Also, the device power between memory accesses is reduced by an automatic power

inputs

down circuit.

The TC55328AP/AJ is suitable for use in high speed applications such as cache memory and high speed storage. All

and outputs are TTL compatible.

The TC55328AP/AJ is available in a 300mil width, 28-pin DIP and SOJ suitable for high density surface assembly.

Features

Fast access time

- TC55328AP/AJ-15

- TC55328AP/AJ-20

-TC55328AP/AJ-25

TC55328AP/AJ-35

? Low power dissipation

Operation:

- TC55328AP/AJ-15

TC55328AP/AJ-20

TC55328AP/AJ-25

- TC55328AP/AJ-35

- Standby:

1mA (max.)

Single 5V power supply: 5V±10

Fully static operation

Inputs and outputs TTL compatible

? Output buffer control: OE

? Package:

15ns (max.)

20ns (max.)

25ns (max.)

35ns (max.)

140mA (max.)

140mA (max.)

140mA (max.)

120mA (max.)

- TC55328AP: DIP28-P-300B

- TC55328AJ: SOJ28-P-300A