TC55417P-35H中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The TC55417P/J-H is a 65,536 bit high speed static random access memory organized as 16,384 words

by 4 bits using CMOS technology, and operated from a single 5-volt supply.

Toshiba's high

performance device technolgy provides both high speed and low power features with a maximum access

time of 15ns/20ns/25ns/35ns and maximum operating current of 120mA/100mA/100mA / 80mA at

minimum cycle time.

The TC55417P/J-H also features an automatic stand-by mode. When deselected by Chip Enable (CE),

the operating current is reduced to 1mA.

The TC55417P/J-H is suitable for use in cache memory and high speed storage, where high speed/

high density are required.

The TC55417P/J-H is packaged in a 24 pin standard plastic DIP and a 24 pin plastic SOJ.

with 0.3 inch width for high density assembly.

The TC55417P/J-H is fabricated with ion implanted CMOS silicon gate MOS technology for high

performance and high reliability.

FEATURES

Fast access time :

TC55417P/J-15H

15ns(MAX.)

TC55417P/J-20H 20ns(MAX.)

TC55417P/J-25H

25ns(MAX.)

TC55417P/J-35H

35ns(MAX.)

5V single power supply: 5V±10

Fully static operation

Diractly TTL compatible :

All Input and Output

? Low power dissipation :

Operation TC55417P/J-15H

TC55417P/J-20H

TC55417P/J-25H

TC55417P/J-35H

Standby

Outpot buffer control : OE

? Package

120mA(MAX.)

100mA(MAX.)

100mA(MAX.)

80mA(MAX.)

1mA(MAX.)

TC55417P-H: DIP24-P-300B

TC55417J-H: SOJ24-P-300A