TC55V328J-25中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

Description

The TC55V328J is a 262,144 bit CMOS high speed static random access memory organized as 32,768 words by 8 bits and

designed to operate from a single 3.3V supply. Toshiba's advanced CMOS technology and circuit design enable high speed, low

voltage operation.

The TC55V328J features low power dissipation when the SRAM is deselected using chip enable (CE) and has an output

enable input (OE) for fast memory access. It is suitable for use in high speed applications such as cache memory. All inputs and

outputs are LVTTL (low voltage TTL) compatible.

The TC55V328J is available in a 28-pin, 300mil SOJ package suitable for high density assembly.

Features

Fast access time

- TC55V328J-20

- TC55V328J-25

TC55V328J-35

-

? Low power dissipation

- Operation:

- TC55V328J-20

TC55V328J-25

TC55V328J-35

70mA (max.)

70mA (max.)

70mA (max.)

300μA (max.)

Standby:

Fully static operation

20ns (max.)

25ns (max.)

35ns (max.)

Single power supply: 3.3V ±0.3V

Output buffer control: OE

Inputs and outputs:

- LVTTL compatible

? Package:

TC55V328J: SOJ28-P-300A