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TC58FVM7T2AFT80中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

TC58FVM7T2AFT80
廠商型號(hào)

TC58FVM7T2AFT80

功能描述

128-MBIT (16M × 8 BITS/8M × 16 BITS) CMOS FLASH MEMORY

文件大小

622.28 Kbytes

頁面數(shù)量

69

生產(chǎn)廠商 Toshiba Semiconductor
企業(yè)簡稱

TOSHIBA東芝

中文名稱

株式會(huì)社東芝官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-31 23:00:00

TC58FVM7T2AFT80規(guī)格書詳情

DESCRIPTION

The TC58FVM7T2A/B2A is a 134217728-bit, 3.0-V read-only electrically erasable and programmable flash

memory organized as 16777216 × 8 bits or as 8388608 × 16 bits. The TC58FVM7T2A/B2A features commands for

Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on

the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The

TC58FVM7T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or

Erase operation.

FEATURES

? Power supply voltage

VDD = 2.3 V~3.6 V

? Operating temperature

Ta = ?40°C~85°C

? Organization

16M × 8 bits/8M × 16 bits

? Functions

Simultaneous Read/Write

Page Read (8-word/16-byte)

Auto Program, Auto Page Program

Auto Block Erase, Auto Chip Erase

Fast Program Mode/Acceleration Mode

Program Suspend/Resume

Erase Suspend/Resume

Data Polling/Toggle Bit

Block Protection, Boot Block Protection

Automatic Sleep, Support for Hidden ROM Area

Common Flash Memory Interface (CFI)

Byte/Word Modes

? Block erase architecture

8 × 8 Kbytes/255 × 64 Kbytes

? Boot block architecture

TC58FVM7T2A: top boot block

TC58FVM7B2A: bottom boot block

? Mode control

Compatible with JEDEC standard commands

? Erase/Program cycles

105 cycles typ

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23+
NA/
3260
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80000
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TOSHIBA
TSOP
899933
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TSOP56
34809
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TOSHIBA
22+
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3000
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TSSOP
7000
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8200
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東芝|Toshiba
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SOP
12588
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TOSHIBA
23+
TSOP56
5000
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7003
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