TC74AC112F中文資料東芝數據手冊PDF規(guī)格書

廠商型號	TC74AC112F
功能描述	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
文件大小	277.89 Kbytes
頁面數量	7 頁
生產廠商	Toshiba Semiconductor
企業(yè)簡稱	TOSHIBA【東芝】
中文名稱	株式會社東芝官網
原廠標識
數據手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-26 22:50:00
人工找貨	TC74AC112F價格和庫存，歡迎聯系客服免費人工找貨

Dual J-K Flip Flop with Preset and Clear

The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Features

? High speed: fmax = 170 MHz (typ.) at VCC = 5 V

? Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

? High noise immunity: VNIH = VNIL = 28 VCC (min)

? Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.

? Balanced propagation delays: tpLH ～ ? tpHL

? Wide operating voltage range: VCC (opr) = 2 to 5.5 V

? Pin and function compatible with 74F112

型號：
TC74AC112F
制造商：
TOSHIBA
制造商全稱：
Toshiba Semiconductor
功能描述：
CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear