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TC74AC112F中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

TC74AC112F
廠商型號(hào)

TC74AC112F

功能描述

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件大小

277.89 Kbytes

頁面數(shù)量

7

生產(chǎn)廠商 Toshiba Semiconductor
企業(yè)簡(jiǎn)稱

TOSHIBA東芝

中文名稱

株式會(huì)社東芝官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2024-12-24 13:00:00

TC74AC112F規(guī)格書詳情

Dual J-K Flip Flop with Preset and Clear

The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Features

? High speed: fmax = 170 MHz (typ.) at VCC = 5 V

? Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

? High noise immunity: VNIH = VNIL = 28 VCC (min)

? Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.

? Balanced propagation delays: tpLH ~ ? tpHL

? Wide operating voltage range: VCC (opr) = 2 to 5.5 V

? Pin and function compatible with 74F112

產(chǎn)品屬性

  • 型號(hào):

    TC74AC112F

  • 制造商:

    TOSHIBA

  • 制造商全稱:

    Toshiba Semiconductor

  • 功能描述:

    CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
TOSHIBA
23+
SOP14
50000
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TOS
23+
SOP
7000
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TOS
24+
SOP
2987
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TOSHIBA/東芝
23+
DIP14
11200
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TOSHIBA
SOP-14
9639
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TOSHIBA
11+
SOP16
8000
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TOS
22+23+
SOP
10374
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TOSHIBA/東芝
23+
SOP
50000
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TOSHIBA
22+
SOP5.2mm
10000
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TOS
2016+
SOP
6528
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