TC74HC280P中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

The TC74HC280 is a high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate

CMOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the

CMOS low power dissipation.

It is composed of nine data inputs (A thru 1) and odd/even parity outputs (2ODD and

EVEN).

The nine input data control the output conditions.

When the number of high level inputs is odd, ODD output is kept high and EVEN output

low. On the contrary, when the number is even, EVEN output is kept high and 2ODD low.

This IC facilitates operation of either odd or even parity application.

The word-length capability is easily expanded by

cascading.

All inputs are equipped with protection circuits against

static discharge or transient excess voltage.

FEATURES:

. High Speed.....

. Low Power Dissipation.......

. High Noise Immunity...

. Output Drive Capability.......10

. Symmetrical Output Impedance.. IOH=IOL-4mA (Min.)

. Balanced Propagation Delays...tpLH÷tpHL

. Wide Operating Voltage Range..VCC (opr)=2V ~6V

. Pin and Function Compatible with 74LS280

tpd-33ns (Typ.) at Vcc=5V.

Icc-4A (Max.) at Ta-25°C

VNIH VNIL-28 VCC (Min.)

LSTTL Loads