TC74VHC126FN中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

The TC74VHC125/126 are high speed CMOS QUAD BUS

BUFFERS fabricated with silicon gate C2MOS technology.

They achieve the high speed operation similar to equivalent

Bipolar Shottky TTL while maintaining the CMOS low power

dissipation.

The TC74VHC125 requires the 3-stato control input to be

set high to place the output into the high impedance state,

whereas the TC74VHC126 requires the control input G to be

set low to place the output into high impedance.

An input protection circuit ensures that 0 to 7V can be

applied to the input pins without regard to the supply

voltage. This device can be used to interface 5V to 3V

systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched

supply and input voltages.

FEATURES:

High Speed...

? Low Power Dissipation-

tpd=3.8ns(typ.) at Vcc=5V

Icc=4/A(Max.) at Ta=25*C

High Noise Immunity....... -VNIH-VNIL -28 Vcc (Min.)

? Power Down Protection is provided on all inputs.

Balanced Propagation Delays tpLH=tpHL

Wide Operating Voltage Range

......

Vcc (opr.)=2V~5.5V

VOLP=0.8V (Max.)

? Low Noise....

? Pin and Function Compatible with 74ALS125/126