TC74VHC74F_V01中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

The TC74VHC74 is an advanced high speed CMOS D - FLIP

FLOP fabricated with silicon gate CEMOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

The signal level applied to the D INPUT is transferred to Q

OUTPUT during the positive going transition of the CK

pulse.

CLR and PR are independent of the CK and are

accomplished by setting the appropriate input low.

An input protection circuit ensures that 0 to 7V can be

applied to the input pins without regard to the supply

voltage. This device can be used to interface 5V to 3V

systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched

supply and input voltages.

FEATURES:

? High Speed...

fMAX=170MHz(typ.)

? Low Power Dissipation

at Vcc=5V

Icc=2/A(Max.) at Ta = 25°C

VNIH VNIL = 28 Vcc (Min.)

? Power Down Protection is provided on all inputs.

? High Noise Immunity

Balanced Propagation Delays tpLH=tpHL

? Wide Operating Voltage Range: Vcc (opr) = 2V~5.5V

? Pin and Function Compatible with 74ALS74