TH58NVG1S3AFT中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

2GBIT (256M u 8BITS) CMOS NAND E2PROM

DESCRIPTION

The TH58NVG1S3A is a single 3.3-V 2G-bit (2,214,592,512 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048+64) bytes x 64 pages x 2048 blocks. The device has a 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4Kbytes: 2112 bytes x 64 pages).

The TH58NVG1S3A is a serial-type memory device which utilizes the I/O pins for both address and data input / output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density nonvolatile memory data storage.

FEATURES

? Organization

Memory cell allay 2112 u 64K u 8 u 2

Register 2112 u 8

Page size 2112bytes

Block size (128K  4K) bytes

? Modes

Read, Reset, Auto Page Program

Auto Block Erase, Status Read

? Mode control

Serial input?output

Command control

? Powersupply VCC 2.7 V to 3.6 V

? Program/Erase Cycles 1E5 Cycles(With ECC)

? Access time

Cell array to register 25 μs max

Serial Read Cycle 50 ns min

? Operating current

Read (50 ns cycle) 10 mA typ.

Program (avg.) 10 mA typ.

Erase (avg.) 10 mA typ.

Standby 50 μA max

? Package

TSOP I 48-P-1220-0.50(Weight : 0.53 g typ.)