TMP86CH09NG中文資料東芝數據手冊PDF規(guī)格書

The TMP86FH09ANG is a single-chip 8-bit high-speed and high-functionality microcomputer incorporating 16384 bytes of Flash Memory. It is pin-compatible with the TMP86CH09NG (Mask ROM version). The TMP86FH09ANG can realize operations equivalent to those of the TMP86CH09NG by programming the on-chip Flash Memory.

Features

1. 8-bit single chip microcomputer TLCS-870/C series

- Instruction execution time :

0.25 μs (at 16 MHz)

122 μs (at 32.768 kHz)

- 132 types & 731 basic instructions

2. 17interrupt sources (External : 5 Internal : 12)

3. Input / Output ports (26 pins)

Large current output: 8pins (Typ. 20mA), LED direct drive

4. Prescaler

- Time base timer

- Divider output function

5. Watchdog Timer

6. 16-bit timer counter: 1 ch

- Timer, External trigger, Window, Pulse width measurement, Event counter, Programmable pulse generate (PPG) modes

7. 8-bit timer counter : 2 ch

- Timer, Event counter, Programmable divider output (PDO), Pulse width modulation (PWM) output, Programmable pulse generation (PPG) modes

8. 8-bit UART : 1 ch

9. 8bit Serial Expansion Interface (SEI): 1 channel

(MSB/LSB selectable and max. 4Mbps at 16MHz)

10. 10-bit successive approximation type AD converter

- Analog input: 6 ch

11. Key-on wakeup : 4 channels

12. Clock operation

Single clock mode

Dual clock mode

13. Low power consumption operation

STOP mode: Oscillation stops. (Battery/Capacitor back-up.)

SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock stop.)

SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock oscillate.)

IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high frequency clock. Release by falling edge of the source clock which is set by TBTCR.

IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interruputs(CPU restarts).

IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruputs. (CPU restarts).

SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low frequency clock.Release by falling edge of the source clock which is set by TBTCR.

SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru put.(CPU restarts).

SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruput.

14. Wide operation voltage:

4.5 V to 5.5 V at 16MHz /32.768 kHz

2.7 V to 5.5 V at 8 MHz /32.768 kHz