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TPS62916中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

TPS62916
廠商型號(hào)

TPS62916

功能描述

TPS6291x 3-V to 17-V, 4.5-A/6-A/8-A Low Noise and Low Ripple Buck Converter With Integrated Ferrite Bead Filter Compensation

文件大小

1.90928 Mbytes

頁(yè)面數(shù)量

34 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱(chēng)

TI1德州儀器

中文名稱(chēng)

德州儀器官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-3-9 11:06:00

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TPS62916規(guī)格書(shū)詳情

1 Features

? Low output 1/f noise < 20 μVRMS

(100 Hz to 100 kHz)

? Low output voltage ripple < 10 μVRMS after ferrite

bead

? High PSRR of > 65 dB (up to 100 kHz)

? 2.2-MHz, 1.4-MHz, or 1-MHz fixed frequency peak

current mode control

? Synchronizable with external clock (optional)

? Integrated loop compensation supports ferrite

bead for second stage L-C filter with 30-dB

attenuation (optional)

? Spread spectrum modulation (optional)

? 3.0-V to 17-V input voltage range

? 0.8-V to 5.5-V output voltage range

? 25-mΩ/6.5-mΩ RDSon

? Output voltage accuracy of ±1 over temperature

? Precise enable input allows

– User-defined undervoltage lockout

– Exact sequencing

? Adjustable soft start

? Power-good output

? Output discharge (optional)

? –40°C to 150°C junction temperature range

? 2.5-mm × 3.0-mm QFN with 0.5-mm pitch

? Create a custom design using the TPS6291x with

the WEBENCH? Power Designer

2 Applications

? Telecom infrastructure

? Test and measurement

? Aerospace and defense (radar, avionics)

? Medical

3 Description

The TPS6291x devices are a family of high-efficiency,

low noise, and low ripple current mode synchronous

buck converters. The devices are designed for noise

sensitive applications that normally use an LDO for

post regulation such as high-speed ADCs, clock

and jitter cleaner, serializer, de-serializer, and radar

applications.

To reduce the output voltage ripple, the device

loop compensation is designed to operate with an

optional second-stage ferrite bead L-C filter. Lowfrequency

noise levels, similar to a low-noise LDO,

are further achieved by filtering the internal voltage

reference with a capacitor connected to the NR/SS

pin. Combined, these features allow for an output

voltage ripple below 10 μVRMS.

The device operates at a fixed switching frequency

of 2.2 MHz, 1.4 MHz, or 1 MHz, and can be

synchronized to an external clock. An optional spread

spectrum modulation scheme spreads the DC/DC

switching frequency over a wider span, which lowers

the mixing spurs.

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