TPS7H3302MDAPTSEP中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1 Features

? Vendor item drawing available, VID V62/22625

? Total ionizing dose (TID) characterized to 50

krad(Si)

– TID RLAT (radiation lot acceptance testing) for

every wafer lot to 50 krad(Si)

? Single-event effects (SEE) characterized

– Single event latch-up (SEL), single event

burnout (SEB), and single event gate rupture

(SEGR) immune to linear energy transfer (LET)

= 43 MeV-cm2/mg

– Single event functional interrupt (SEFI) and

single event transient (SET) characterized to 43

MeV-cm2/mg

? Supports DDR, DDR2, DDR3, DDR3L, and DDR4

termination applications

? Input voltage: supports a 2.5-V and 3.3-V rail

? Separate low-voltage input (VLDOIN) down to

0.9 V for improved power efficiency

? 3-A sink and source termination regulator

? Enable input and power-good output for power

supply sequencing

? VTT termination regulator

– Output voltage range: 0.5 to 1.75 V

– 3-A sink and source current

? Integrated precision voltage divider network with

sense input

? Remote sensing (VTTSNS)

? VTTREF buffered reference

– 49 to 51 accuracy with respect to

VDDQSNS (±3 mA)

– ±10 mA sink and source current

? Undervoltage lockout (UVLO) and overcurrent limit

(OCL) functionality integrated

? Space Enhanced Plastic (SEP)

– Controlled baseline

– Gold bondwire

– NiPdAu lead finish

– One assembly and test site

– One fabrication site

– Military (–55°C to 125°C) temperature range

– Extended product life cycle

– Extended product-change notification (PCN)

– Product traceability

– Meets NASA’s ASTM E595 outgassing

specification

2 Applications

? Satellite electrical power system (EPS)

? Command and data handling (C&DH)

? Optical imaging payload

? Radar imaging payload

3 Description

The TPS7H3302 is a radiation-tolerant double data

rate (DDR) 3-A termination regulator with built-in

VTTREF buffer. The regulator is specifically designed

to provide a complete, compact, low-noise solution for

space DDR termination applications such as single

board computers, solid state recorders, and payload

processing.

The TPS7H3302 supports DDR VTT termination

applications using DDR, DDR2, DDR3, DDR3L, and

DDR4. The fast transient response of the TPS7H3302

VTT regulator allows for a very stable supply during

read/write conditions. The TPS7H3302 also includes

a built-in VTTREF supply that tracks VTT to further

reduce the solution size. To enable simple power

sequencing, both an enable input and a powergood

output (PGOOD) have been integrated into the

TPS7H3302. The enable signal can also be used to

discharge VTT during suspend to RAM (S3) power

down mode.