TS80C31X2-LCBR中文資料Temic數(shù)據(jù)手冊PDF規(guī)格書

Description

TEMIC TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller.

The TS80C31X2 retains all features of the TEMIC TSC80C31 with 128 bytes of internal RAM, a 5-source, 4 priority level interrupt system, an on-chip oscilator and two timer/counters.

Features

● 80C31 Compatible

? 8031 pin and instruction compatible

? Four 8-bit I/O ports

? Two 16-bit timer/counters

? 128 bytes scratchpad RAM

● High-Speed Architecture

? 40 MHz @ 5V, 30MHz @ 3V

? X2 Speed Improvement capability (6 clocks/machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

● Dual Data Pointer

● Asynchronous port reset

● Interrupt Structure with

? 5 Interrupt sources,

? 4 priority level interrupt system

● Full duplex Enhanced UART

? Framing error detection

? Automatic address recognition

● Power Control modes

? Idle mode

? Power-down mode

? Power-off Flag

● Once mode (On-chip Emulation)

● Power supply: 4.5-5.5V, 2.7-5.5V

● Temperature ranges: Commercial (0 to 70°C) and Industrial (-40 to 85°C)

● Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1 (13.9 footprint)