TS80C32X2-MCBR中文資料Temic數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

TEMIC TS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C52X2 retains all features of the TEMIC

80C51 with extended ROM/EPROM capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source , 4-level interrupt system, an on-chip oscilator and three timer/counters.

In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a X2 speed improvement mechanism.

Features

● 80C52 Compatible

? 8051 pin and instruction compatible

? Four 8-bit I/O ports

? Three 16-bit timer/counters

? 256 bytes scratchpad RAM

● High-Speed Architecture

? 40 MHz @ 5V, 30MHz @ 3V

? X2 Speed Improvement capability (6 clocks/machine cycle) 30 MHz @ 5V, 20 MHz @ 3V (Equivalent to 60 MHz @ 5V, 40 MHz @ 3V)

● Dual Data Pointer

● On-chip ROM/EPROM (8K-bytes)

● Programmable Clock Out and Up/Down Timer/Counter 2

● Asynchronous port reset

● Interrupt Structure with

? 6 Interrupt sources,

? 4 level priority interrupt system

● Full duplex Enhanced UART

? Framing error detection

? Automatic address recognition

● Low EMI (inhibit ALE)

● Power Control modes

? Idle mode

? Power-down mode

? Power-off Flag

● Once mode (On-chip Emulation)

● Power supply: 4.5-5V, 2.7-5.5V

● Temperature ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC)

● Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1 (13.9 footprint), CQPJ44 (window), CDIL40

(window)