首頁(yè)>TSC80C31-12MH>規(guī)格書(shū)詳情
TSC80C31-12MH中文資料Temic數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
廠(chǎng)商型號(hào) |
TSC80C31-12MH |
功能描述 | CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
文件大小 |
205.82 Kbytes |
頁(yè)面數(shù)量 |
19 頁(yè) |
生產(chǎn)廠(chǎng)商 | TEMIC Semiconductors |
企業(yè)簡(jiǎn)稱(chēng) |
Temic |
中文名稱(chēng) | TEMIC Semiconductors官網(wǎng) |
原廠(chǎng)標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-8 16:04:00 |
相關(guān)芯片規(guī)格書(shū)
更多- TSC80C31-12MFR/883
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- TSC80C31-12MER/883
- TSC80C31-12MFB/883
- TSC80C31-12MBR/883
- TSC80C31-12MDR/P883
- TSC80C31-12MED/883
- TSC80C31-12MGD/883
- TSC80C31-12MDD/883
- TSC80C31-12MC
- TSC80C31-12MDB/883
- TSC80C31-12MCB/883
- TSC80C31-12MEB/883
- TSC80C31-12MGB/883
TSC80C31-12MH規(guī)格書(shū)詳情
Description
The TSC80C31/80C51 is high performance SCMOS versions of the 8051 NMOS single chip 8 bit μC. The fully static design of the TSC80C31/80C51 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
The TSC80C31/80C51 retains all the features of the 8051 : 4 K bytes of ROM ; 128 bytes of RAM ; 32 I/O lines ; two 16 bit timers ; a 5-source, 2-level interrupt structure ; a full duplex serial port ; and on-chip oscillator and clock circuits.
Features
? Power control modes
? 128 bytes of RAM
? 4 K bytes of ROM (TSC80C31/80C51)
? 32 programmable I/O lines
? Two 16 bit timer/counter
? 64 K program memory space
? 64 K data memory space
? Fully static design
? 0.8 μm CMOS process
? Boolean processor
? 5 interrupt sources
? Programmable serial port
? Temperature range : commercial, industrial, automotive and military
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---|---|---|---|---|---|---|---|
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21+ |
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49 |
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6800 |
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24+ |
PLCC |
1 |
本站現(xiàn)庫(kù)存 |
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22+23+ |
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18841 |
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23+ |
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8650 |
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23+ |
PLCC44 |
9800 |
全新原裝現(xiàn)貨,假一賠十 |
詢(xún)價(jià) | ||
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DIP40 |
699839 |
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TEMIC |
9735 |
16 |
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詢(xún)價(jià) | |||
TEMIC? |
24+ |
NEW PDIP40? |
16800 |
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詢(xún)價(jià) | ||
TEMIC |
24+ |
DIP |
270 |
原裝現(xiàn)貨假一賠十 |
詢(xún)價(jià) |